A wide-input 7–40 V low-dropout regulator and bandgap-referenced precision output

Abstract

Abstract

Purpose This paper aims to present a robust wide-input low-dropout regulator (LDO) for automotive and industrial power-management applications. The proposed LDO operates across a wide input voltage range from 7 to 40 V, delivering a regulated 5 V output for low-current analog and mixed-signal subsystems. The main design objectives are to improve high-voltage tolerance, startup reliability and reference stability under harsh supply and temperature conditions. Design/methodology/approach The proposed architecture combines a hybrid high-voltage/low-voltage (HV/LV) MOS isolation strategy with a digitally supervised startup and reference-handover mechanism. High-voltage MOS devices are selectively used at input-stressed nodes to isolate excessive voltage stress, while most analog control and reference circuits are implemented with low-voltage devices to improve transconductance and design efficiency. During startup, a constant-gm bias circuit provides a temporary reference to initiate regulation. Once the output voltage reaches a stable operating level, a comparator and a 4-bit digital counter control the handover from the constant-gm reference to the bandgap reference. An on-chip 550 kHz clock generator is integrated to support the digital counter without requiring external timing signals. Findings The proposed LDO was implemented using a 0.25-µm 1P3M CMOS process and verified through circuit-level SPICE simulations. The regulator achieves stable operation across a 7 to 40 V input-voltage range, delivers a regulated 5 V output and supports a maximum load current of 25 µA. The bandgap reference provides an approximately 1.2 V reference voltage for steady-state operation. Full process−voltage−temperature simulations were performed across TT, SS, FF, SF and FS process corners, an input-voltage range of 7 to 40 V and a temperature range from −40°C to 125°C. In addition, 200-run Monte Carlo simulations were conducted to evaluate the effects of device mismatch on reference voltage, output voltage and startup transition timing. The results confirm stable regulation, deterministic startup behavior and successful prevention of zero-current equilibrium under slow input-ramp conditions. Key simulated performance metrics: They include a dropout voltage of 1.0 V at a 25 µA load, line regulation of ±0.2% over the 7–40 V input range, load regulation of ±0.5% across the 0–25 µA load range and a temperature coefficient of 200 ppm/°C from −40°C to 125°C. Originality/value The main contribution of this work is not limited to extending the input-voltage range of an LDO, but lies in the system-level integration of high-voltage isolation, low-voltage control circuitry and digitally supervised reference handover. Compared with conventional wide-input LDO designs that mainly emphasize regulation accuracy or transient response, the proposed design explicitly addresses startup determinism and high-voltage domain isolation in a self-powered architecture. The hybrid HV/LV MOS strategy improves practical implementation efficiency, while the digitally supervised startup mechanism ensures reliable activation before the bandgap reference takes over. These features make the proposed LDO suitable for low-current automotive and industrial power-management systems requiring wide-input tolerance, stable startup and robust operation under process, voltage and temperature variations.